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February 09, 2012

Cavium's New 100Gbps OCTEON Processors Get Broad Support from PACE Ecosystem Partners

Semiconductor company Cavium announced that is has received unprecedented support from its “Partnership to Accelerate Customer End-Solutions" (PACE) ecosystem partners for the new OCTEON III MIP S64 processor family that delivers over 100Gbps of application performance per chip.

The OCTEON III family integrates one to 48 MIPS64 cores, at up to 2.5GHz, and deliver up to 120GHz of industry-leading 64 bit compute power per chip, according to company officials.

Some of the supporting partners include companies like 6WIND, Advantech, Emerson Network Power, Kontron, Kaspersky Lab,  L&T Infotech, Macraigor Systems, MIPS Technologies, MontaVista Software, PLX Technology, QNX Software Systems, Radisys, Tata Elxsi Limited, TeamF1, Vineyard Networks, Wind River and most recently Lauterbach.

The new OCTEON processor family of one - 48 core multicore processors is optimized for advanced applications in the telecommunications industry. In addition to cloud computing, high-end core and edge routers, Metro Ethernet, Enterprise switches and 3G/4G/LTE base-stations, the new processor series is also optimized for enterprise security gateways and appliances, storage networking and mobile core infrastructure equipment. 

"Cavium's PACE partners have proved invaluable in delivering industry-leading multi-core hardware and software solutions based on our OCTEON family across three generations which has helped us achieve a leading market position," said Rajiv Khemani, chief operating officer at Cavium, in a statement. "Their combined support for our new OCTEON III family will continue to enable customers to bring highly differentiated systems quickly to market."

The ecosystem partners deliver OCTEON multi-core solutions across a wide range of operating systems, development tools, applications, stacks, debuggers, complimentary silicon, middleware, hardware and software consulting, and a wide range of hardware appliances and platforms.

Cavium's innovative new chip interconnect architecture also allows multiple chips to be combined into a single logical high-performance processor. The OCTEON III processors are also designed to speed search, protocol parsing and traffic management as well as enhanced cryptography, compression and deep packet inspection engines.


Rajani Baburajan is a contributing editor for MobilityTechzone. To read more of Rajani's articles, please visit her columnist page.

Edited by Rich Steeves


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