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Texas Instruments Partners with Aricent to Optimize Its KeyStone Multicore SoCs

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March 01, 2012

Texas Instruments Partners with Aricent to Optimize Its KeyStone Multicore SoCs

By Calvin Azuri, TMCnet Contributor


Texas Instruments (News - Alert) Incorporated (TI) recently announced that it will be collaborating with Aricent (News - Alert) over the development of an integrated solution for optimizing small cell protocol stack for its KeyStone-based multicore System-on-Chips (SoCs). Leveraging the joint solution from TI and Aricent, users of KeyStone-based multicore processors and SoCs will be able speed up development of high performance base stations cost-effectively.


The small cell protocol stack customized for TI's KeyStone-based multicore processors and SoCs users combines the TI KeyStone design for layers 2, 3 and the transport processing functionality along with software solutions from Aricent. This integration forms the basis for ease in the development of cost-effective performance-based base stations. 

In a release, Rakesh Vij, vice president of Business Development at Aricent Group, said that, “The combination of TI's industry-leading KeyStone multicore DSPs and Aricent's proven software frameworks creates powerful, reliable, and cost-efficient base station solutions for operators. Our small cell protocol stack has been chosen by several leading OEM vendors and is in advanced trials or production systems today. This collaboration further cements our leadership in providing world-class LTE (News - Alert) software. Our software together with our product engineering services help OEMs to introduce innovative new solutions to the market quickly and efficiently.”

The scalable design of the KeyStone solution allows for TMS320C66x digital signal processors (DSP) generation cores and multiple cache coherent quad ARM (News - Alert) Cortex-A15 clusters support. The KeyStone framework also comes with a completely offloaded, flexible packet as well as security coprocessors and is capable of enabling capacity expansion for SoC components which include TeraNet, Multicore Navigator, and Multicore Shared Memory Controller (MSMC).

These structural components are instrumental in driving easy integration between DSP and ARM RISC cores which means developers of base stations can effectively leverage the functionalities of the processing elements, which include cores and enhanced AccelerationPacs.

Sameer Wasson, business manager of Wireless Base Station Infrastructure at Texas Instruments, said that, “With our scalable KeyStone architecture and Aricent's field-proven technology, we are able to deliver the most complete small cell solution today. TI and Aricent provide equipment manufacturers with everything they need to quickly develop highly differentiated and cost-efficient high performance base stations.”






Edited by Jennifer Russell







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