This article originally appeared in the Sept. 2011 issue of Next Gen Mobility
Henry Kissinger famously said that “Power is the ultimate aphrodisiac.” But the attraction to power for most of use these days has to do primarily with its ability to keep our laptops, smartphones and tablets running.
SuVolta Inc., a startup backed by Kleiner Perkins Caufield & Byers, is aiming to address that desire with the introduction of transistor technology that greatly reduces the power consumption of any integrated circuit. While this new technology can be used in a wide variety of applications, it is particularly appealing for the mobile market.
Jeff Lewis, vice president of business development for SuVolta, tells NGM that the company’s technology cuts in half the power consumed by chips, and without affecting performance. He explains that to enable that, SuVolta reduces the variation of the transistor so it reacts more consistently. That, in turn, allows chips to operate at much lower voltages.
Not only does that enable a longer charge on the device, it also helps prevent the device from getting too hot to handle, he says.
"Up to this point in time, semiconductor process technology innovation has primarily focused on increasing performance,” says Scott Thompson, SuVolta CTO, (who was the youngest fellow ever at Intel (News - Alert), according to Lewis). “But the biggest problem in semiconductors today is not performance but power. SuVolta is solving the power impasse by significantly reducing transistor threshold voltage variation and therefore enabling supply voltage scaling.”
The solution, known as PowerShrink, includes something called deeply depleted channel CMOS transistor technology, DDC-optimized circuits and related design techniques to provide voltage reductions of 30 percent or more. According to SuVolta, it can halve active power consumption and reduce leakage power consumption by 80 percent or more. And it works with wide variety of integrated circuit products including processors, SRAMs, and SOCs.
"In a world where mobile applications increasingly dominate, power and cost are the primary limiters of scaling semiconductor process technologies. SuVolta has developed an innovative way to significantly reduce CMOS transistor active and leakage power. By tightening threshold voltage variability while maintaining performance at lower supply voltage, SuVolta's platform extends the useful life of bulk planar CMOS processes and the products they enable and negates the need for costly, complex technologies like EUV lithography, FD-SOI or FinFETs. Furthermore, the technology enables companies to preserve and extend the legacy IP blocks they have spent years developing," says T.J. Rodgers, founder, president, CEO, and a director of Cypress Semiconductor.
Fujitsu (News - Alert) Semiconductor is the first customer of the SuVolta technology. It has licensed PowerShrink for use in a 65nm implementation in its Application-Specific Standard Product, Application Specific Integrated Circuits, and Customer Owned Tooling products. These Fujitsu offerings are slated for availability in the second half of 2012.
Meanwhile, a 28nm version of SuVolta PowerShrink is currently sampling.
Edited by
Jennifer Russell